This invention was conceived in the context of the Mobile Industry Processor Interface (MIPI) Alliance Low Latency Interface (LLI) working group. The LLI interface protocol standard is designed to achieve low latency communication between chips. LLI comprises a data link layer (DL) and physical adaptation layer (PA). LLI provides DL lossless error transmission over a lossy physical communication channel. LLI ensures correct data transmission by using error detection and a scheme of the transmitter resending data when the receiver detects an error and signals a transmission error notification (NACK). The scheme is described in U.S. Pat. No. 8,522,104, titled “Smart Aging Retry Buffer,” issued Aug. 27, 2013, and MIPI Alliance Specification for Low Latency Interface (LLI) Version 1.0.
LLI transmitted atomic data units (PHITs) are small in order to improve latency, but this implies that the protection information is a significant throughput and power consumption overhead. An improved protocol can use longer atomic data units for data that is less latency-sensitive.
In an improved protocol, multiple DL frames are losslessly compressed into an extended PHIT (ePHIT) if they comprise certain redundancy, such as they belong to the same channel, they are of the same type, or they have the same transaction ID field. In one embodiment, single DL frames can be taken to which frame sequence number and cyclic redundancy check (CRCs) fields are appended to form PHITs. Alternatively, groups of four DL frames can be compressed. Sequence numbers and CRC fields are appended to form ePHITs. Whether frames are combined and transmitted as ePHITs or transmitted as separate PHITs depends on the properties of the frames. When frames are combined into ePHITs, they carry the same DL data as four PHITs but with less overhead. That results in greater data throughput. In one embodiment the throughput improvement is 25%. Frame combining is the more common case with normal traffic patterns.
This scheme creates big problems. Compared to a retry buffer that holds only PHITs a retry buffer that holds both PHITs and ePHITs is more complex. It requires more buffering because more time is necessary for receivers to detect CRC errors in ePHITs since they are longer. If the retry buffer is organized for standard PHIT width, storing ePHIT entries requires multiple PHIT entries and the control becomes very complex, if organized in ePHITs then the datapath is very large and storage of regular PHITs is sub-optimal.
Because ePHITs are longer than PHITs the DL error rate is significantly higher for ePHITs than for a sequence of PHITs. Furthermore, the CRC mechanism to support ePHITs is not backward compatible with transmitter retry buffers that do not support ePHITs.